8,541 research outputs found

    Achieving hip fracture surgery within 36 hours: an investigation of risk factors to surgical delay and recommendations for practice

    Get PDF
    BACKGROUND: The UK hip fracture best practice tariff (BPT) aims to deliver hip fracture surgery within 36Ā h of admission. Ensuring that delays are reserved for conditions which compromise survival, but are responsive to medical optimisation, would help to achieve this target. We aimed to identify medical risk factors of surgical delay, and assess their impact on mortality. MATERIALS AND METHODS: Prospectively collected patient data was obtained from the National Hip Fracture Database (NHFD). Medical determinants of surgical delay were identified and analysed using a multivariate regression analysis. The mortality risk associated with each factor contributing to surgical delay was then calculated. RESULTS: A total 1361 patients underwent hip fracture surgery, of which 537 patients (39.5Ā %) received surgery within 36Ā h of admission. Following multivariate analyses, only hyponatraemia was deduced to be a significant risk factor for delay RRĀ =Ā 1.24 (95Ā % CI 1.06-1.44). However, following a validated propensity score matching process, a Pearson chi-square test failed to demonstrate a statistical difference in mortality incidence between the hypo- and normonatraemic patients [Ļ‡ (2) (1, NĀ =Ā 512)Ā =Ā 0.10, pĀ =Ā 0.757]. CONCLUSIONS: Hip fracture surgery should not be delayed in the presence of non-severe and isolated hyponatraemia. Instead, surgical delay may only be warranted in the presence of medical conditions which contribute to mortality and are optimisable. LEVEL OF EVIDENCE: III

    A Reconfigurable Tile-Based Architecture to Compute FFT and FIR Functions in the Context of Software-Defined Radio

    Get PDF
    Software-defined radio (SDR) is the term used for flexible radio systems that can deal with multiple standards. For an efficient implementation, such systems require appropriate reconfigurable architectures. This paper targets the efficient implementation of the most computationally intensive kernels of two significantly different standards, viz. Bluetooth and HiperLAN/2, on the same reconfigurable hardware. These kernels are FIR filtering and FFT. The designed architecture is based on a two-dimensional arrangement of 17 tiles. Each tile contains a multiplier, an adder, local memory and multiplexers allowing flexible communication with the neighboring tiles. The tile-base data path is complemented with a global controller and various memories. The design has been implemented in SystemC and simulated extensively to prove equivalence with a reference all-software design. It has also been synthesized and turns out to outperform significantly other reconfigurable designs with respect to speed and area

    Comparative study of turbulence models in predicting hypersonic inlet flows

    Get PDF
    A numerical study was conducted to analyze the performance of different turbulence models when applied to the hypersonic NASA P8 inlet. Computational results from the PARC2D code, which solves the full two-dimensional Reynolds-averaged Navier-Stokes equation, were compared with experimental data. The zero-equation models considered for the study were the Baldwin-Lomax model, the Thomas model, and a combination of the Baldwin-Lomax and Thomas models; the two-equation models considered were the Chien model, the Speziale model (both low Reynolds number), and the Launder and Spalding model (high Reynolds number). The Thomas model performed best among the zero-equation models, and predicted good pressure distributions. The Chien and Speziale models compared very well with the experimental data, and performed better than the Thomas model near the walls

    Optimization of osmotic dehydration process for Oyster mushrooms (Pleurotus sajor-caju) in sodium chloride solution using RSM

    Get PDF
    Sodium chloride (NaCl) and water transfer were quantitatively investigated during osmotic dehydration of Oyster mushrooms (Pleurotus sajor-caju) using response surface methodology with the NaCl concentration (10ā€“ 20%, w/v), solution temperature (30ā€“60Ā° C) immersio n time (15ā€“240 min) and solution to fruit ratio (4:1 to 8:1) were taken as independent process variables. Experiments were conducted in a thermostatically controlled agitating incubator. For each response, second order polynomial models were developed using multiple linear regression analysis. Analysis of variance (ANOVA) was performed to check the adequacy and accuracy of the fitted models. The response surfaces and contour maps showing the interaction of process variables were constructed. Applying desirability function method, the optimum operating conditions were found to be: solution temperature ā€“ 45o C, immersion time ā€“ 53.54 min, salt concentration ā€“ 14.09% and solution to fruit ratio 6.08:1. Corresponding to these optimum values water loss, solute gain and weight reduction were 38.13, 2.1 and 36.02 (g/100 g initial mass) respectively

    Computing a rectilinear shortest path amid splinegons in plane

    Full text link
    We reduce the problem of computing a rectilinear shortest path between two given points s and t in the splinegonal domain \calS to the problem of computing a rectilinear shortest path between two points in the polygonal domain. As part of this, we define a polygonal domain \calP from \calS and transform a rectilinear shortest path computed in \calP to a path between s and t amid splinegon obstacles in \calS. When \calS comprises of h pairwise disjoint splinegons with a total of n vertices, excluding the time to compute a rectilinear shortest path amid polygons in \calP, our reduction algorithm takes O(n + h \lg{n}) time. For the special case of \calS comprising of concave-in splinegons, we have devised another algorithm in which the reduction procedure does not rely on the structures used in the algorithm to compute a rectilinear shortest path in polygonal domain. As part of these, we have characterized few of the properties of rectilinear shortest paths amid splinegons which could be of independent interest

    Ariel - Volume 12 Number 2

    Get PDF
    Executive Editors David G. Polin Larry H. Pastor Business Manager Alex Macones Jean Lien Editorial Page Editor Deepak Kapoor Sports Editor Todd Hoover Photography Editors Lois Leach Ken Yonemur

    Energy efficient microprocessor platform based on instructional level parallelism

    Get PDF
    Embodiments of a processing architecture are described. The architecture includes a fetch unit for fetching instructions from a data bus. A scheduler receives data from the fetch unit and creates a schedule allocates the data and schedule to a plurality of computational units. The scheduler also modifies voltage and frequency settings of the processing architecture to optimize power consumption and throughput of the system. The computational units include control units and execute units. The control units receive and decode the instructions and send the decoded instructions to execute units. The execute units then execute the instructions according to relevant software.</p
    • ā€¦
    corecore